Some semiconductor devices have a microcomputer formed in one semiconductor chip. In this semiconductor chip having the microcomputer formed therein, a central processing unit (CPU) composed of a logic circuit such as a CMISFET (Complementary Metal Insulator Semiconductor Field Effect Transistor), a memory, an analog circuit or the like is formed.
Among these, for example, an electrically rewritable nonvolatile memory is used as the memory. In addition, a driving circuit such as a boosting circuit or an analog circuit is formed in the semiconductor chip in order to operate the nonvolatile memory, and a highly accurate capacitive element is necessary for the driving circuit or the analog circuit. Therefore, a capacitive element is formed in the semiconductor chip in addition to the nonvolatile memory described above.
Some of such capacitive elements are formed simultaneously with a memory cell of a nonvolatile memory by using a process of manufacturing the memory cell of the nonvolatile memory. The capacitive element is referred to as a PIP (Polysilicon Insulator Polysilicon) capacitive element because it uses a polycrystalline silicon (polysilicon) film for an upper electrode and a lower electrode.
Japanese Patent Application Laid-Open Publication No. 2009-99640 (Patent Document 1) discloses the technology for a semiconductor device provided with a capacitive element having a lower electrode formed on a semiconductor substrate, a capacitive insulating film formed on the lower electrode and an upper electrode formed on the capacitive insulating film. The lower electrode is made of a polysilicon film and the upper electrode is made of a polysilicon film.
Also, in some cases, a control gate electrode included in the nonvolatile memory cell is composed of a laminated film made up of two layers of polycrystalline silicon films (polysilicon films) in order to suppress the increase of crystal grain diameter (grain size) in the control gate electrode.
In the technology for a semiconductor device having a nonvolatile memory disclosed in Japanese Patent Application Laid-Open Publication No. 2014-103204 (Patent Document 2), the nonvolatile memory has a selection gate electrode including a first polysilicon film and a second polysilicon film which are sequentially stacked on a semiconductor substrate via a first insulating film.